As AI workloads continue to grow, two major limiting factors are power consumption and interconnect bandwidth. By leveraging the high data throughput and scalability of photonic systems, silicon photonics presents an opportunity to break through performance bottlenecks in both of these areas. Photonic matrix multiplication systems can perform operations ~10x faster than the typical clock speed of electronic systems, while photonic interconnects improve memory bandwidth and enable larger and more flexible network topologies. Integration of photonics and CMOS enables scalability and cost advantages, and allows photonic components to seamlessly integrate with existing compute architectures and infrastructure. We will present recent developments in silicon photonics for AI workloads, discuss design and manufacturing challenges that allow scaling from the device to full system level, and contrast with other methods of analog and digital compute.