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Mike Davies is Director of Intel’s Neuromorphic Computing Lab. Since 2014 he has been researching neuromorphic architectures, algorithms, software, and systems, and has fabricated several neuromorphic chip prototypes to date, including the Loihi series. In the 2000s, as a founding employee of Fulcrum Microsystems and director of its silicon engineering, Mike pioneered high-performance asynchronous design methods and led the development of several generations of industry leading Ethernet switches. Before that, he received B.S. and M.S. degrees from Caltech.

A critical enabler for progress in neuromorphic computing research is the ability to transparently evaluate different neuromorphic solutions on important tasks and to compare them to state-of-the-art conventional solutions. The Intel Neuromorphic Deep Noise Suppression Challenge (Intel N-DNS Challenge), inspired by the Microsoft DNS Challenge, tackles a ubiquitous and commercially relevant task: real-time audio denoising. Audio denoising is likely to reap the benefits of neuromorphic computing due to its low-bandwidth, temporal nature and its relevance for low-power devices. The Intel N-DNS Challenge consists of two tracks: a simulation-based algorithmic track to encourage algorithmic innovation, and a neuromorphic hardware (Loihi 2) track to rigorously evaluate solutions. For both tracks, we specify an evaluation methodology based on energy, latency, and resource consumption in addition to output audio quality. We make the Intel N-DNS Challenge dataset scripts and evaluation code freely accessible, encourage community participation with monetary prizes, and release a neuromorphic baseline solution which shows promising audio quality, high power efficiency, and low resource consumption when compared to Microsoft NsNet2 and a proprietary Intel denoising model used in production. We hope the Intel N-DNS Challenge will hasten innovation in neuromorphic algorithms research, especially in the area of training tools and methods for real-time signal processing. We expect the winners of the challenge will demonstrate that for problems like audio denoising, significant gains in power and resources can be realized on neuromorphic devices available today compared to conventional state-of-the-art solutions.

As AI workloads continue to grow, two major limiting factors are power consumption and interconnect bandwidth. By leveraging the high data throughput and scalability of photonic systems, silicon photonics presents an opportunity to break through performance bottlenecks in both of these areas. Photonic matrix multiplication systems can perform operations ~10x faster than the typical clock speed of electronic systems, while photonic interconnects improve memory bandwidth and enable larger and more flexible network topologies. Integration of photonics and CMOS enables scalability and cost advantages, and allows photonic components to seamlessly integrate with existing compute architectures and infrastructure. We will present recent developments in silicon photonics for AI workloads, discuss design and manufacturing challenges that allow scaling from the device to full system level, and contrast with other methods of analog and digital compute.

We introduce Neural Circuit Theory (NCT), a mathematical framework which bridges neuroscience, deep learning, and electrical circuit theory. We show how NCT can describe biological neural circuits and leads to physical formulations of bio-plausible algorithms for credit assignment, such as Equilibrium Propagation and Difference Target Propagation. We show how these formulations can lead to quadratic speedups in the inference and training speed of energy-based models as well as estimation of curvature information in feedforward networks. Finally, we discuss the geometric structure that is embedded in NCT, which naturally contains information about the topology of the network.

We are still many years away from large-scale quantum computers, which are poised for massive impact in a number of areas. Quantum computers will be used as part of general, hybrid computing platforms in the cloud, and will provide a key ingredient to push through barriers impossible to breach without them. They are not magical devices: classical computing, powered by AI, will still be handling most of the workload. It is possible that Quantum will also unlock new advances in AI itself, though this is not something to take for granted. In this talk I will discuss all of these issues, including steps we can take today to prepare for the quantum future.

The advancement of Artificial Intelligence (AI) and its swift deployment on resource-constrained systems relies on refined algorithm-hardware co-design. In this talk, we first propose our solution to craft efficient lightweight AI algorithms via model compression and neural architecture search on broad AI applications, such as image recognition, 2D/3D semantic segmentation, and recommender systems. Then, we involve efficient cross-optimization design and distributed learning to brew swift scalable AI algorithms with specialized compute kernel and hardware architecture. Finally, we demonstrate the improvements in performance-efficiency trade-off on alternative real-world applications, such as electronic design automation and adversarial machine learning. Through these explorations, we present our vision for the future of the full-stack optimization of AI solutions.

Join our invited speakers in open discussion and debate on next-generation AI computing approaches!